Linear-feedback shift register

In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state.

The most commonly used linear function of single bits is exclusive-or (XOR). Thus, an LFSR is most often a shift register whose input bit is driven by the XOR of some bits of the overall shift register value.

The initial value of the LFSR is called the seed, and because the operation of the register is deterministic, the stream of values produced by the register is completely determined by its current (or previous) state. Likewise, because the register has a finite number of possible states, it must eventually enter a repeating cycle. However, an LFSR with a well-chosen feedback function can produce a sequence of bits that appears random and has a very long cycle.

Applications of LFSRs include generating pseudo-random numbers, pseudo-noise sequences, fast digital counters, and whitening sequences. Both hardware and software implementations of LFSRs are common.

The mathematics of a cyclic redundancy check, used to provide a quick check against transmission errors, are closely related to those of an LFSR.

{:deps
 {org.clojure/clojure {:mvn/version "1.10.0"}
  org.clojure/tools.deps.alpha
  {:git/url "https://github.com/clojure/tools.deps.alpha.git"
   :sha "f6c080bd0049211021ea59e516d1785b08302515"}
  compliment {:mvn/version "0.3.9"}}}
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Extensible Data Notation
(use 'clojure.tools.deps.alpha.repl)
(clojure-version)
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"1.10.0"
(add-lib 'org.clojure/core.async {:mvn/version "0.4.490"})
6.1s
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true
(require '[clojure.core.async :as async])
(async/timeout 100)
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Vector(4) [clojure.core.async.impl.channels.ManyToManyChannel, "0x2646bb1", "clojure.core.async.impl.channels.ManyToManyChannel@2646bb1", Map]
(defn lfsr [s {[^long x ^long y ^long z] :taps}]
  (concat (drop 1 s)
          [(bit-xor (nth (- x 1))
                    (nth s (- y 1))
                    (nth s (- z 1)))]))
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user/lfsr

APU Noise

The NES APU noise channel generates pseudo-random 1-bit noise at 16 different frequencies.

The noise channel contains the following: envelope generator, timer, Linear Feedback Shift Register, length counter.

  • $400C - Length counter halt, constant volume/envelope flag, and volume/envelope divider period (write)

  • $400E - Mode and period (write)

    Bit 7 - Mode flag

    Bits 3-0 - The timer period is set to entry P of the following (NTSC):

    4, 8, 16, 32, 64, 96, 128, 160, 202, 254, 380, 508, 762, 1016, 2034, 4068

  • $400F - Length counter load and envelope restart (write)

The shift register is 15 bits wide, with bits numbered:

14 - 13 - 12 - 11 - 10 - 9 - 8 - 7 - 6 - 5 - 4 - 3 - 2 - 1 - 0

When the timer clocks the shift register, the following actions occur in order:

  1. Feedback is calculated as the exclusive-OR of bit 0 and one other bit: bit 6 if Mode flag is set, otherwise bit 1.

  2. The shift register is shifted right by one bit.

  3. Bit 14, the leftmost bit, is set to the feedback calculated earlier.

This results in a pseudo-random bit sequence, 32767 steps long when Mode flag is clear, and randomly 93 or 31 steps long otherwise. (The particular 31- or 93-step sequence depends on where in the 32767-step sequence the shift register was when Mode flag was set).

The mixer receives the current envelope volume except when

On power-up, the shift register is loaded with the value 1.

The earliest revisions of the 2A03 CPU ignored the Mode flag, treating it as always 0. These CPUs were used in the first batch of Famicom consoles that were recalled, in Vs. System boards, and in the arcade games that used the 2A03 as a sound coprocessor.[1]

The 93-step sequence is about a quarter tone (50 cents) sharp relative to A440 tuning. The approximate frequencies and pitches (in LilyPond's variant of Helmholtz notation) are as follows:

Shift+Enter to run
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Runtimes (1)